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About Xiper

Building the toolchain for Python-defined FPGA

Xiper lets software engineers design, simulate and ship FPGA logic in Python — no HDL required. We're building the compiler (XiperPy), the component library (XiperLib) and the browser-based design environment (XiperLab) that make FPGA as approachable as software.

Meet the team → Where we are → Open roles →

Let's build it together — get in touch.